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FPGA Boards Leverage Advances in FPGA Speeds and Densities

As FPGA chip vendors continue to bulk up densities and enhance throughput speeds, FPGA processing board vendors are crafting more powerful solutions aimed at military signal processing systems.

JEFF CHILD, EDITOR-IN-CHIEF | March 2016

Today FPGAs have hands down become the main engine for digital signal processing in military system designs. The kind of signal processing functionality on today’s FPGA chips are ideally suited to the kind of system-oriented DSP functions used in defense. And signal processing capabilities of FPGAs continue to climb satisfying those applications for whom an appetite for ever more processing muscle is endless. Today FPGAs have even become complete systems on a chip. The high-end lines of the major FPGA vendors have general-purpose CPU cores on them. And the military is hungry to use FPGAs to fill processing roles.

Devices like the Xilinx Virtex-6 and -7 and the Altera Stratix IV and V are examples that have redefined an FPGA as a complete processing engine in its own right. And newer FPGA families like Xilinx’s UltraScale Kintex 7 and Altera’s Arria 10 and Stratix 10 FPGAs are also showing up on embedded board-level products. The Data Sheet roundup on the next couple pages shows several examples of board and module products using all those leading edge FPGA devices.

Exemplifying the cutting edge developments of FPGA chip vendors, Xilinx in January announced its first customer shipment of the Virtex UltraScale+ FPGA: the industry’s first high-end FinFET FPGA built using TSMC’s 16FF+ process. The Virtex UltraScale+ devices join the Zynq UltraScale+ MPSoCs and Kintex UltraScale+ FPGAs putting all three families of the now into the Xilinx 16nm portfolio. Virtex UltraScale+ devices build on the success of the Virtex UltraScale family, the industry’s only 20nm high-end FPGAs. The devices feature capabilities like 32G transceivers, PCIe Gen 4 integrated cores and UltraRAM on-chip memory technology.

For its part Altera, now the Programmable Solutions Group (PSG) within Intel Corporation, recently announced adding transceiver technology that will enable Stratix 10 FPGAs and SoCs to support data rates up to 56 Gbps. Altera demonstrating the FPGA industry’s first dual-mode 56-Gbps pulse-amplitude modulation with 4-levels (PAM-4) and 30-Gbps non-return-to-zero (NRZ) transceivers. The transceiver technology doubles the bandwidth available on a single transceiver channel.

Aside from processing, another big advantage of FPGAs lies in their ample, programmable, high-speed I/O, which is why they are often found close to the analog-to-digital converters (ADC) behind radar phased arrays. Board level vendors continue to roll out integrated solutions using the latest greats ADCs and DACs tied with FPGA processing.

To feed those needs, board vendors continue to push the barriers with solutions with ever faster ADCs and more sophisticated FPGAs. A number of digital receiver products combine ADCs and FPGAs on one VME, VPX, or PCI Express board, while others partition the integrate an FPGA processing engine with mezzanine-based ADCs using form-factors like FMC or XMC. And for size, weight and power (SWaP) constrained radar systems aboard UAVs for example, those board level solutions need to be highly integrated (Figure 1).

Figure 1 To enable digital conversion in radar systems board vendors continue to push the barriers with solutions with ever faster ADCs and more sophisticated FPGAs. For size-constrained radar systems aboard UAVs those board level solutions need to be highly integrated.

The FPGA Processing Boards Roundup and Links to the full data sheets for each product are posted below.

Figure 1

Figure 1 4DSP

UltraScale-based PCIe Gen3 x8 Card Provides Dual FMC Sites

The PC821 from 4DSP is a high-performance, PCI Express card with advanced DSP capabilities and multiple I/O options. It supports two VITA 57.1-compliant HPC FMCs that are closely coupled to the Virtex or Kintex UltraScale FPGA and a DDR4-2133 SDRAM SO-DIMM. The PC821 is well suited for applications that require large-band signal digitization or generation through the use of accelerated frequency domain algorithms.

  • Virtex UltraScale or Kintex UltraScale.
  • PCIe Gen3 x8.
  • 1x Primary FMC HPC (front).
  • 1x Secondary FMC HPC (rear).
  • DDR4-2133 SDRAM SO-DIMM.
  • 1 Gbit FPGA configuration flash; 256 Mbit serial flash.
  • Single-lane SFP+ interface.
  • Bidirectional x8 FireFly connection (optional); Standalone operation (optional).

PC821 Data Sheet:  Click Here 

4DSP
Austin, TX
(800) 816-1751
www.4dsp.com

  Figure 2

Figure 2 Acromag

XMC Modules Feature Xilinx Artix -7 FPGA with 200l Logic Cells

Acromag’s XMC-7A200 modules feature a high-performance user-configurable Xilinx Artix-7 FPGA enhanced with 200k logic cells, high-speed memory and a high-throughput serial bus interface. The result is a powerful and flexible I/O processor module that is capable of executing custom instruction sets and algorithms. Typical uses include hardware simulation, communications, in-circuit diagnostics, military servers, signal intelligence, and image processing.

  • Reconfigurable Xilinx Artix-7 FPGA with 200k logic cells.
  • 128M x 64-bit DDR3 SDRAM; 32M x 16-bit parallel flash memory for MicroBlaze FPGA program code storage.
  • 4-lane high-speed serial interface on rear P15 connector for PCIe Gen 1/2 (standard), Serial RapidI/O, 10Gb Ethernet, Xilinx Aurora.
  • 60 SelectI/O or 30 LVDS pairs plus 2 global clock pairs direct to FPGA via rear P4 port.
  • 34 SelectI/O or 17 LVDS pairs plus 2 global clock pairs direct to FPGA via rear P16 port

XMC-7A200 Data Sheet:  Click Here

Acromag
Wixom, MI.
(248) 295-0310
www.acromag.com

  Figure 3

Figure 3 Bittware

Dual Arria 10 FPGA PCIe Board Sports 10G Optical I/O

Bittware’s A10PED is a full-length PCIe x8 card featuring two Altera Arria 10 GT/GX/SX FPGAs. The Arria 10 boasts high densities and a power-efficient FPGA fabric married with a rich feature set including high-speed transceivers up to 15 Gbps, hard floating-point DSP blocks, and embedded Gen3 PCIe x8. The board is ideal for a wide range of applications, including network processing and security, compute and storage, instrumentation, broadcast, and SIGINT.

  • Two Altera Arria 10 GT/GX/SX FPGAs.
  • Two PCIe x8 interfaces supporting Gen1, Gen2, or Gen3.
  • Two 12x Avago fiber optic modules.
  • QSFP cage for 4x 10GigE.
  • Board Management Controller for Intelligent Platform Management.
  • Utility I/O: USB 2.0, SATA, powered GPIO header, Ethernet.
  • Memory options include up to 4 Gbyte Hybrid Memory Cube; Up to 64 Gbytes of DDR4 SDRAM with ECC; Up to 144 Mbytes QDR-IV and up to 288 Mbytes QDR-II+.

A10PED Data Sheet:  Click Here    Registration required

BittWare
Concord, NH
(603) 226-0404
www.bittware.com

  Figure 4

Figure 4 Curtiss Wright

Board Set Combines Virtex 7 FPGA Board with 25 GS/s ADC Card

The CHAMP-WB-A25G is a board set from Curtiss-Wright that couples the dense processing resources of a single large Xilinx Virtex-7 FPGA with a high-bandwidth 25 Gsample/s 8-bit ADC module in a commercial grade 6U OpenVPX (VITA 65) form factor module. The 25G ADC module can also operate in a dual channel 12.5 Gsample/s mode. The board set complements this processing capability with a data plane directly connected to the FPGA with support for Gen2 Serial RapidIO (SRIO) or Aurora up to 10.3 Gbps.

  • OpenVPX (VITA 65) MOD6-PER-4F-12.3.1-8; MOD6-PER-1Q-12.3.5-2 VPX REDI (VITA 48 option).
  • Single user-programmable Xilinx Virtex-7 FPGAs X690T, with 8 GB DDR3L SDRAM.
  • Single-channel 25 GS/s, dual-channel 12.5 GS/s 8-bit ADC.
  • 20 x backplane SerDes capable of 10.3 Gbps each.
  • Onboard PCIe Gen3 switch.

CHAMP-WB-A25G Data Sheet:  Click Here    Registration required

Curtiss-Wright Defense Solutions
Ashburn, VA
(703) 779-7800
www.cwcdefense.com

  Figure 5

Figure 5 Extreme Engineering

6U Conduction-Cooled Signal Processing Module Sports Dual Virtex-7s FPGAs

The XCalibur5090 from Extreme Engineering is a high-performance, reconfigurable, conduction-cooled 6U LRM module based on the Xilinx Virtex-7 family of FPGAs. With a pair of Virtex-7 FPGA, high-speed serial interfaces, DAC and ADC channels, external memory, and flexible, high-density I/O, the XCalibur5090 is ideal for customizable, high-bandwidth, signal-processing applications.

  • Two Xilinx Virtex-7 XC7VX690T FPGAs.
  • Up to 1 Gbyte of DDR3-1600 SDRAM per FPGA in two channels.
  • Non-volatile FPGA configuration flash;
128 MB of user NOR flash per FPGA.
  • Conduction-cooled 6U LRM form factor.
  • Four 14-bit 2500 MSPS AD9739 DAC; Two dual-channel 12-bit 3200 MSPS ADC12D1600RF ADC.
  • 234 single-ended FPGA interconnects; Eight high-speed serial FPGA interconnects.
  • 28 FPGA GPO to the backplane; 51 FPGA GPI from the backplane; 17 FPGA GPIO to the backplane.

XCalibur5090 Data Sheet:  Click Here

Extreme Engineering Solutions
Middleton, WI
(608) 833-1155
www.xes-inc.com

  Figure 6

Figure 6 Innovative Integration

XMC Module Marries UltraScale FPGA and Dual 5.1 GSPS DACs

Innovative Integration’s XU-TX is an XMC module which features two AC-coupled single-ended 16-bit DAC outputs with programmable DC bias. The DAC devices employed support synchronization, interpolation, and their unique output circuits allow improved frequency synthesis in the 2nd and 3rd Nyquist zones. The maximum sample rate of the DAC IC is 10.2 GSPS.

  • Two 16-bit, greater than 5.1 GSPS DAC channels.
  • Over 2 GHz analog bandwidth (1X),
  • Enhanced 2nd and 3rd Nyquist modes.
  • Up to 7,800 Mbyte/s streaming via PCIe or Aurora.
  • Internal or external clocking; Fixed latency, multi-board synchronization.
  • Xilinx Kintex UltraScale FPGA XCKU060/085.
  • 4 Gbytes of DDR4 DRAM in 2 banks each with 64 bit interface.
  • 4 Mbytes of QDR SRAM in 1 bank with 32 bit interface.

XU-TX Data Sheet:  Click Here    Registration required

Innovative Integration
Simi Valley, CA
(805) 578-4260
www.innovative-dsp.com

  Figure 7

Figure 7 Interface Concept

Virtex-7 FPGA-Based 3U VPX Board Provides FMC Site

The IC-FEP-VPX3c expands Interface Concept’s Front End Processing family with a solution based on Xilinx Virtex-7 FPGAs to respond to seemingly insatiable bandwidth demand. Designed for applications requiring a very high level of computing power in a compact 3U form factor, the board is aimed at developers who want to streamline development by concentrating their efforts on their most critical tasks.

  • Xilinx Virtex-7 XC7VX690T FPGA (other versions on demand).
  • Two banks of DDR3: 64-bit wide, 2 Gbytes each; Optional QDRII+ 450MHz, 36-bit wide / up to 36 Mbits; 128 Mbytes of BPI NOR Flash.
  • Four 4-lanes fabric ports on P1; General purpose I/Os on P2; FMC interfaces.
  • PIC µ-controller for System Management to VITA 46.11; 8 LEDs; 8 configuration switches.
  • Rear Transition Module.
  • Air-cooled and conduction cooled versions compliant with VITA 47 classes.

IC-FEP-VPX3c Data Sheet:  Click Here    Registration required

Interface Concept
Quimper, France
+33 (0)2 98 57 30 30
www.interfaceconcept.com

  Figure 8

Figure 8 Mercury Systems

XMC I/O Module Features In-Mission Dynamic FPGA Reconfiguration

Mercury Systems’ Ensemble IOM-300 series are rugged, programmable I/O XMC modules and the industry’s first fiber-optic modules which are supported by two FPGA devices. The primary Altera industrial-grade Stratix-V FPGA is a formidable, customizable processing resource for low-latency signal processing and is supported by a second configuration-FPGA that enables in-mission, real-time image refreshes.

  • Main FPGA processor: Altera Stratix V – 5SGXA5 or 5SGXA7.
  • Configuration FPGA: (PCIe Gen 2.1 interface).
  • 5 Gbytes DDR3 SDRAM; 128 Mbytes of flash memory.
  • Gen 2 x8 or Gen 3 x8 PCI Express ports to host processor.
  • Up to 12 pairs of fiber optic links at 10 Gbits/s each, full-duplex 850 nm multi-mode fiber (~range 150m).
  • XMC P16 ports: 8 SERDES at up to 10 Gbit/s; 12+19 LVDS pairs (various speeds, 19 LVDS pairs separable to single ended).

Ensemble IOM-300 Data Sheet:  Click Here

Mercury Systems
Chelmsford, MA
(866) 627-6951.
www.mrcy.com.

  Figure 9

Figure 9 Nallatech

FPGA Accelerator Card Delivers Sustained 3 Teraflops Performance

Nallatech’s 510T is an FPGA co-processor designed to deliver ultimate performance per watt for compute-intensive datacenter applications. The 510T is a GPU-sized 16-lane PCIe 3.0 card featuring two of Altera’s new floating-point enabled Arria 10 FPGAs delivering up to sixteen times the performance of the previous generation. Applications can achieve a total sustained performance of up to 3 Teraflops. Memory bandwidth configured as eight independent banks of DDR4 plus an ultra-fast Hybrid Memory Cube (HMC).

  • GPU form factor card.
  • Two Arria 10-10A 1150 GX FPGAs.
  • PCIe Gen3 x 16 host interface.
  • Up to 290 Gbytes/s peak aggregate memory bandwidth.
  • 85 Gbyte/s Peak DDR4 memory bandwidth per FPGA (4 Banks per FPGA).
  • 30 Gbyte/s Write +30 Gbyte/s Read Peak HMC bandwidth per FPGA.

510T Data Sheet:  Click Here

Nallatech
Camarillo, CA
(805) 383-8997
www.nallatech.com   Figure A

Figure A Pentek

XMC Blends 200 MHz, ADC, FPGA and VITA Radio Transport Protocol

Pentek’s 71664 is part of its Cobalt family of high-speed data converter XMC FPGA modules. This board provides a 4-channel, 200 MHz 16-bit A/D with programmable digital down converter, and is based on the Xilinx Virtex-6 FPGA. The 71664 is the first Pentek product to include an IP engine for the VITA 49.0 Radio Transport (VRT) protocol.

  • Complete radar and software radio interface solution,
  • PCIe output supports VITA 49.0 VITA Radio Transport (VRT) Standard.
  • Supports Xilinx Virtex-6 LXT and SXT FPGAs.
  • Four 200 MHz 16-bit A/Ds; Four multiband DDCs; Multiboard programmable beamformer.
  • Up to 2 Gbytes of DDR3 SDRAM or 32 Mbytes of QDRII+ SRAM.
  • PCI Express (Gen. 1 & 2) interface up to x8 wide; Optional LVDS connections to the Virtex-6 FPGA for custom I/O.
71664 Data Sheet:  Click Here Pentek
Upper Saddle River, NJ
(201) 818-5900
www.pentek.com

  Figure B

Figure B RTD Embedded Technologies

PCIe/104 Card Sports Spartan-6 User Programmable FPGA

RTD Embedded Technologies’ FPGA35S6046 and FPGA35S6101 (shown) are PC/104 FPGA modules with a PCIe/104 stackable bus structure. The FPGA35S6xxx modules provide a platform for customer developed FPGA code. Based on a Xilinx Spartan-6, they feature four RS-232/422/485 transceivers connected to FPGA pins allowing custom serial port implementations.

  • PC/104 form factor.
  • PCIe/104 stackable bus structure.
  • PCIe x1 interface.
  • Xilinx Spartan-6 FPGA with up to 101,261 Logic Cells, 5,800 Kb of internal RAM and PCI Express interface.
  • Gbit of DDR2 SDRAM.
  • On-board 27 MHz oscillator.
  • 32 RS-232/422/485 I/Os using four connectors; Each connector can support a single full RS-232 port or two TX/RX only ports.

FPGA35S6101 Data Sheet:  Click Here

RTD Embedded Technologies
State College, PA
(814) 234-8087
www.rtd.com   Figure C

Figure C TEK Microsystems

VXS/VME FPGA Card Serves up 12-Bit ADCs and DACs

The QuiXilica Gemini-V6 VXS from TEK Microsystems is a 6U VME and VXS high-speed digitizer board that combines FPGA processing with 12-bit ADC and DAC technology. By employing three Xilinx Virtex-6 FPGAs, the board combines high resolution wideband signal acquisition and generation with the onboard high density FPGA processing for applications such as target generation, jamming, and CM / CHM techniques.

  • One 12-bit ADC channels at 3.6 GSPS, or three channels at 1.8 GSPS.
  • Combines ADC with DAC output channel at up to 4.0 GSPS.
  • Twelve fiber optic interfaces.
  • One SFP port for Gigabit Ethernet connectivity.
  • Three Virtex-6 devices available per board (LX240, SX315, or SX475).
  • 5 Gbytes of DDR3 SDRAM.
  • Convection or conduction cooled options.

QuiXilica Gemini-V6 VXS Data Sheet:  Click Here

TEK Microsystems
Chelmsford, MA
(978) 244-9200
www.tekmicro.com